Solid state storage devices use analog memory cells to store data. Each memory cell stores a storage value, such as an electrical voltage. The storage value represents the information stored in the memory cell. Many solid state storage devices distinguish between different binary values that a memory cell may store based on a read voltage level of the memory cell. The range of possible storage values for each memory cell is typically divided into threshold regions, with each region separated by a read threshold voltage and corresponding to one or more data bit values. Ideally, all of the memory cells in a given solid state storage device have identical read threshold voltages for the logical bit values stored. In practice, however, the read threshold voltages differ across the cells in probability distributions along the read threshold voltage axis (e.g., “read threshold voltage distributions”) that are similar to a Gaussian distribution.
In addition, solid state storage devices can shift over time. For example, memory cell leakage, memory cell damage and other disturbances to memory cells can alter the read voltage levels of the memory cells. Thus, the read threshold voltages can shift over time. If the read voltage level of a memory cell shifts past a read threshold voltage, a data error occurs, as the value of the data read from the memory cell is different than the value of the data that was written to the memory cell.
A number of techniques have been proposed or suggested for adapting to the changes in the read threshold voltages to maintain a desired performance level. Existing adaptive tracking algorithms are designed to track variations in the solid state storage channel and consequently, to help maintain a set of updated channel parameters. The updated channel parameters are used, for example, to adjust read threshold voltages.
A need exists for improved techniques for adapting read threshold voltages that estimate the bit error rate using a non-linear mapping of syndrome weights.